1. Field of the Invention
The present invention relates to the field of integrated circuits. In particular, the present invention relates to power controlling integrated circuits, retention integrated circuits and corresponding standard circuit cells.
2. Description of the Prior Art
It is known to provide voltage switching devices in integrated circuits for coupling a voltage supply input to a voltage supply output in response to a power control input signal. Such voltage switching devices are useful components for all sorts of integrated circuits.
Modern integrated circuits comprise System-on-Chip (SoC) designs comprising perhaps millions of transistor gates. Design and fabrication of such complex System-on-Chip circuits is typically accomplished by making use of Computer Aided Design tools and the use of standard cell libraries comprising standard sub-components providing representations of different types of logic gates (e.g. AND, NAND, XOR) or storage functions (e.g. flip flops or latches) together with transistor interconnect structures. Thus Standard cell methodology helps circuit designers to scale Application Specific Integrated Circuits (ASICs) from comparatively simple single-function integrated circuits comprising several thousands of gates to complex multi million gate System-on-Chip devices.
As the complexity of System-on-Chip designs increases, circuit performance characteristics such as dynamic and leakage power savings are becoming increasingly important to enable longer battery life and also to reduce system fabrication cost. Accordingly, dynamic and leakage power reduction is a key focus of circuit designers. Dynamic power can be reduced by lowering the operation voltage for the entire chip or for certain blocks or sections of a chip and several distinct on-chip voltage islands can be implemented by using voltage level shifters. However, the reduction in physical size of semi-conductor components on modern integrated circuits has lead to a trend to use lower threshold-voltage circuit elements because these can be made to perform voltage switching more rapidly. The reduction in threshold voltages can have a side effect of increasing the power consumption of an integrated circuit due to an increase in leakage current.
It is known to reduce leakage power in an integrated circuit by, for example, powering down blocks of circuitry of the integrated circuit by using on-chip power gates by switching these to either power or ground and isolation gates between elements within the circuit to prevent floating inputs or outputs arising when portions of the integrated circuit are powered down, which could otherwise result in unpredictable or incorrect operation elsewhere. However, when powering down parts of the chip, it may be necessary to maintain the state of some chip elements. This can be done by the use of retention flip-flops, and retention latches. Such state retention mechanisms sometimes use so called “balloon latches”.
Whilst previously known techniques have been effective in reducing leakage current they typically have a high associated overhead in terms of both the circuit elements (e.g. balloon latches or retention latches) needed to support the additional functionality and in terms of the circuit complexity and control routing. These factors typically lead to a requirement to increase the circuit die area. Thus whilst previously known power controlling mechanisms address reducing leakage current they can inadvertently introduce new complexities and overheads when the circuits incorporating them are fabricated. Accordingly, there is a requirement for a power control integrated circuit that offers a reduction in leakage current when the integrated circuit is powered down or is operating in a data retention mode yet reduces the overhead associated with the leakage current reduction circuitry.